TPU Silicon Validation Engineer

Company: Google
Location: Sunnyvale
Posted on: February 1, 2025

Job Description:

corporate_fare Google place Sunnyvale, CA, USAApply

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
• Experience scripting in Python or equivalent programming language.
• Experience in bringing up ASICs, performing functional and performance validation, and debugging failures.Preferred qualifications:
  • Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture, or a related field.
  • 2 years of experience with C++/Python software design principles.
  • Experience bringing up high-power ASICs.
  • Experience with reading hardware description languages (SystemVerilog) and chip design flow, and building test automation tools and scripts.Enthusiasm for unusual computer architectures.About the jobBe part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.In this role, you will work on the test design, bring-up, triage, and debug of TPU subsystems. You will develop and execute test plans for functional and performance validation. You will work closely with design, implementation, design verification, software developers, and emulation prototyping in the development phase of the ASIC life-cycle, ensuring proper features are in place for post-silicon validation and debug. You will collaborate with system software and software test infrastructure developers to ensure we have proper ASIC test coverage for an entire program.In addition, you will help develop a common set of requirements, processes, and tests to ensure smooth and reliable performance of ASIC projects. You will work throughout the entire project lifecycle, from early pre-silicon planning and test development, through end-of-life characterization and failure debug. You will develop and operate software-based tests for full investigation of ASIC operation.You will work closely with both hardware and software teams to successfully validate designs, and to identify design issues. By working closely with designers, you will gain insight into the requirements for full ASIC test coverage. You will help to create and drive testing of our integrated systems with a focus on ASIC functional test verification and characterization.Responsibilities
    • Develop detailed silicon test plans, based on design specifications and coordination with a cross-functional silicon team (architecture, design, software, firmware) for Google's Tensor Processing Units.
    • Implement these test plans by developing software tests and flows for system validation and verification, in addition to driving the creation of some of these tests by others.Endeavor to triage and debug issues found during new product development and find solutions.
      #J-18808-Ljbffr

Keywords: Google, Rancho Cordova , TPU Silicon Validation Engineer, Engineering , Sunnyvale, California